The uNet100 device is a low-power CMOS micro-controller implementing an embedded neural network with programmable I/O interface.  While the central processing core is similar each device variation contains different input and output functions.  The uNet100-3 provides a self contained SPI sampling control interface compatible with most commonly available 8 bit analog to digital converters.  Sampling rates and format are programmable through the devices embedded EEPROM configuration memory.  The uNet100-3 SPI command sequences are preprogrammed in configuration memory and output based on selected sampling rate.  Each neural net consists of a tapped delay line input queue and network computation block with multiple outputs.  The input queue is programmable in length and filled at the programmed sample rate.  Each sampling iteration the network is computed and output responses are threshold tested to SPI command sequences.

Block Diagram

Development of the network parameters and weights are accomplished by using our simple yet powerful (and free!!) NetBuilderLite development tool.  It offers a complete environment allowing network training using application specific vector sets then generating the configuration file used to program uNet devices.  Device programming is achieved by using any standard Atmel AVR ISP or chip programmer available through many sources listed on the Related Links page.  See some of the many application examples for NetBuilderLite definition files on the Applications page.